Expressing Parallelism

Knuth's matrix multiplier doesn't express parallelism itself. It relies on the large register sizes and the hardware's parallel sets of gates to do the hard work. Software developers can't depend on the hardware development to have parallel implementations for their particular application.

Moreover, the gap between typical software code and parallel hardware is large. Languages for hardware design like VHDL and ladder diagrams won't cut it for the next web site. These languages help set down the millions transistors which all contribute their piece of binary logic. They're running their electrons all the time, unlike software programs which go line-by-line, instrucion-by-instruction, or opcode-by-opcode.

The efforts from the CPU designers have kept this problem at bay for a long while. Things like caches, speculative execution, branch prediction have all helped software keep the illusion of a single instruction stream. Development of reduced instruction set computers (RISC) forced some of the problems of branches onto the assembler.

But now, the hardware parts can't continue to increase clock speeds. They can only deliver the basic Moore's law of increasing the number of transistors on a chip.